Do switches dream of machine learning?: Toward in-network classification

Machine learning is currently driving a technological and societal revolution. While programmable switches have been proven to be useful for in-network computing, machine learning within programmable switches had little success so far. Not using network devices for machine learning has a high toll, given the known power efficiency and performance benefits of processing within the network. In this paper, we explore the potential use of commodity programmable switches for in-network classification, by mapping trained machine learning models to match-action pipelines. We introduce IIsy, a software and hardware based prototype of our approach, and discuss the suitability of mapping to different targets. Our solution can be generalized to additional machine learning algorithms, using the methods presented in this work

Towards a highly scalable network tester

High end networked-systems have quickly climbed from a throughput of gigabits/sec to terabits/sec, and are approaching petabits/sec. Alas, network testing equipment has not scaled: it remained either low throughput or extremely expensive. With suitable network testing equipment either not at scale or too expensive even for commercial vendors, systems may be released without proper testing and validation. We propose a methodology for large scale testing of networked systems, based on using a low-cost open source network tester and a commodity switch. Our approach is scalable, open source, and accurate, and can be adapted to a variety of networking equipment, widely available to users.1. Leverhulme Trust Early Career Fellowship ECF-2016-289, 2. (EPSRC) EARL: sdn EnAbled MeasuRement for alL project (Project Reference EP/P025374/1)

Nanoadhesion of elastic bodies : roughness and temperature effects

We present a simple model which illustrates the nature of the contact between an elastic solid and a hard surface with cosine-corrugation profile. In the continuum limit, the contact mechanics depends only on two dimensionless parameters, namely the ratio between the height and wavelength of the substrate corrugation, and the ratio between a surface energy and an elastic energy. The theory shows that the complete contact state is always a local energy minima (in the zero temperature limit), but for large enough surface roughness the global minima correspond to a partial contact state. We show that at nonzero temperature, the contribution to the free energy from the vibrational entropy is very important, and favors the detached state. Computer simulations results are also presented where we study more complicated roughness geometries and the influence of temperature on the adhesion. Simulation results agrees well with the analytical predictions. (C) 2003 American Institute of Physics

FEC killed the cut-through switch

Latency penalty in Ethernet links beyond 10Gb/s is due to forward error correction (FEC) blocks. In the worst case a single-hop penalty approaches the latency of an entire cutthrough switch. Latency jitter is also introduced, making latency prediction harder, with large peak to peak variance. These factors stretch the tail of latency distribution in Rackscale systems and Data Centers, which in turn degrades performance of distributed applications. We analyse the underlying mechanisms, calculate lower bounds and propose a different approach that would reduce the penalty, allow control over latency and feedback for application level optimisation.Rudin foundation, Isaac Newton trust, Leverhulme trust, Microsoft researc

High speed adaptive rack-scale fabrics

Rack-scale systems contain thousands of densely packed con- nected components. While a data center may accommodate a fully provisioned network, rack-scale systems demand a more compact and versatile network that would even up within a heavily populated system. Unless the critical path between communicating hosts is made faster, distributed rack-scale applications cannot scale. We present adaptive rack-scale fabrics, an architecture that uses Physical Layer Primitives, coupled with a Closed Ring Control. The resulting fabric uses pre-fetching techniques, but at the physical layer of the interconnect, to optimize performance within strict power-budget limitations.This work was partly funded by Microsoft Research through its PhD Scholarship Programme, the Leverhulme Trust (ECF- 2016-289) and the the Isaac Newton Trus

A Programmable Framework for Validating Data Planes

Due to the emerging trend of programmable network hardware, developers have begun to explore ways to accelerate various applications and services. As a result, there is a pressing need for new tools and techniques for debugging network devices. This paper presents NetDebug, a fully programmable hardware-software framework for validating and real-time debugging of programmable data planes. We describe validation use cases, compare our design to alternative solutions, and present a preliminary evaluation using a prototype implementation.Leverhulme Trust, Isaac Newton Trust, Swiss National Science Foundation (SNSF

Extreme Data-rate Scheduling for the Data Center

Designing scalable and cost-effective data center interconnect architectures based on electrical packet switches is challenging. To overcome this challenge, researchers have tried to harness the advantages of optics in data center environment. This has resulted in exploration of hybrid switching architectures that contains an optical circuit switch to serve long bursts of traffic along with an electrical packet switch serving short bursts of traffic. The performance of such hybrid switching architectures in data center is dependent on the schedulers. Building hybrid schedulers is challenging because of varying properties of data center traffic, increasing network demands, requirements imposed by hybrid network architecture etc. Slow schedulers can negatively impact the performance of the data center network because of poor resource utilization. With future demands, this problem is going to escalate motivating the need for faster schedulers. One approach to do this would be to use a hardware based scheduler. In this paper we propose a framework that can be used to explore and evaluate hardware based hybrid schedulers.This project is supported by the EPSRC INTERNET Project EP/H040536/1.This is the author accepted manuscript. The final version is available from ACM via http://dx.doi.org/10.1145/2785956.279001

Revolutionising Computing Infrastructure For Citizen Empowerment

The world has dramatically changed over the last decade. Almost every aspect of our lives is being digitally monitored: from our social networks activity, through online shopping habits to healthcare and financial records. The emergence of Internet of Things and the growing presence of Cyber Physical Systems only increase citizens' exposure to digital monitoring by commercial enterprises. In order to maintain citizens' right for privacy while still encouraging an evolving digital economy, people should be given the right to choose where their data is stored and who holds it, a currently unattainable privilege. We propose that through the revolution of computing infrastructure, enabled by new computing architectures, a healthier competitive environment can thrive. In this environment, companies will compete for customers, offering privacy and information control as a service. Such competition, when supported by regulation, will empower citizens, allowing them to take back control of their data.We acknowledge the support from the Leverhulme Trust (ECF-2016-289) and the Isaac Newton Trust. Leverhulme Trust Newton Trust Huawe

Reconfigurable network systems and software-defined networking

Modern high-speed networks have evolved from relatively static networks to highly adaptive networks facilitating dynamic reconfiguration. This evolution has influenced all levels of network design and management, introducing increased programmability and configuration flexibility. This influence has extended from the lowest level of physical hardware interfaces to the highest level of network management by software. A key representative of this evolution is the emergence of softwaredefined networking (SDN). In this paper, we review the current state of the art in reconfigurable network systems, covering hardware reconfiguration, SDN, and the interplay between them. We take a top-down approach, starting with a tutorial on software-defined networks. We then continue to discuss programming languages as the linking element between different levels of software and hardware in the network. We review electronic switching systems, highlighting programmability and reconfiguration aspects, and describe the trends in reconfigurable network elements. Finally, we describe the state of the art in the integration of photonic transceiver and switching elements with electronic technologies, and consider the implications for SDN and reconfigurable network systems.This work was jointly supported by the UKs Engineering and Physical Sciences Research Council (EPSRC) Internet Project EP/H040536/1, an EPSRC Research Fellowship grant to Philip Watts (EP/I004157/2), and DARPA and AFRL under contract FA8750-11-C-0249.This is the final version of the article. It first appeared from IEEE via http://dx.doi.org/10.1109/JPROC.2015.243573

NetFPGA SUME: Toward 100 Gbps as research commodity

The demand-led growth of datacenter networks has meant that many constituent technologies are beyond the budget of the research community. In order to make and validate timely and relevant research contributions, the wider research community requires accessible evaluation, experimentation and demonstration environments with specification comparable to the subsystems of the most massive datacenter networks. We present NetFPGA SUME, an FPGA-based PCIe board with I/O capabilities for 100Gb/s operation as NIC, multiport switch, firewall, or test/measurement environment. As a powerful new NetFPGA platform, SUME provides an accessible development environment that both reuses existing codebases and enables new designs.This work was jointly supported by EPSRC INTERNET Project EP/H040536/1, National Science Foundation under Grant No. CNS-0855268, and Defense Advanced Research Projects Agency (DARPA) and Air Force Research Laboratory (AFRL), under contract FA8750-11-C-0249.This is the author accepted manuscript. The final version is available from IEEE at http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6866035&sortType%3Dasc_p_Sequence%26filter%3DAND%28p_IS_Number%3A5210076%29